When Ldaxr Doesn't Work: Exclusive Accesses and Cacheability on AArch64
A developer documents the challenges of implementing mutual exclusion and spin locks on AArch64 hardware while building a custom operating system. The post details why exclusive memory operations behave differently on real hardware compared to QEMU emulation.
Why it matters
This provides deep technical insight into low-level systems programming and the discrepancies between hardware and virtualization environments.
I've now been working on floss , my own operating system (OS) from scratch for AArch64, which is really just a kernel so far, for a couple of months since my last post about Interrupts and the Generic Interrupt Controller on AArch64 . Right now, floss targets QEMU's virt and Raspberry Pi 4 (rpi4) boards, as well as real Raspberry Pi 5 (rpi5) hardware. Testing on real hardware has been rewarding and makes the project exciting. However, as we'll cover in much detail about in this post, real hardware reveals a new dimension of possible failures/behavior that QEMU doesn't necessarily reveal.
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