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Times of India·4 min read·hard

TSMC builds 0.42nm interface to improve next-gen MoS2 transistors

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TSMC builds 0.42nm interface to improve next-gen MoS2 transistors
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Researchers from Taiwan's NYCU and TSMC have developed a method to improve MoS2 transistors by engineering the atomic interface between the semiconductor and the insulating layer. This breakthrough allows for thinner, more efficient transistors by using a 0.42nm aluminium oxide layer.

Why it matters

This advancement could lead to significantly smaller, faster, and more energy-efficient electronic devices, pushing the boundaries of current silicon-based technology.

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Researchers from Taiwan's National Yang Ming Chiao Tung University (NYCU) and TSMC Corporate Research have developed a new way to improve transistors made from atomically thin materials. They focuses on the tiny boundary where two materials meet, which allowed them to build transistors with an extremely thin insulating layer while maintaining strong electrical performance.According to Science Daily, atomically thin semiconductors have been studied for more than a decade because some can be just one atom thick while still showing useful electrical properties. Such materials could allow transistors to become smaller, faster and more energy efficient than conventional silicon-based devices.However, making these very thin transistors work well has been difficult. One major problem involves the gate dielectric, an extremely thin insulating layer that helps control the movement of electrons.

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