Huawei Unveils Kirin 2026 Benchmark Data: Transistor Density Up 55%, NPU Power Consumption Down 66%

Add to Google Preferred Sources He Tingbo, head of Huawei's semiconductor business, published a paper on the Chinese Academy of Sciences' ChinaXiv preprint platform on September 4, disclosing measured data for the Kirin 2026, the first chip to adopt LogicFolding technology. The chip achieves approximately 55% higher transistor density than its predecessor, yet under equivalent performance conditions, NPU power consumption drops 66%, GPU drops 58%, and CPU performance cores drop 41%. He Tingbo argues that the key to chip energy consumption is not computation itself but data movement. LogicFolding converts long-distance horizontal connections into short-distance vertical connections, reducing data transport energy at the source. She also emphasizes that τ (tau) is a time-scaling law, not an energy-scaling law—if all timing headroom is used to boost performance, power consumption will not naturally decline.